New Imaging Technology Speeds Process Development
Defects and contamination on the wafer can slow process development times and limit performance and yield. As chips get more complex, more defects can become buried within the increasing number of layers in the design. Finding and analyzing these buried defects is a major challenge for the industry, especially during the early learning cycles of new manufacturing processes. At advanced semiconductor technology nodes, buried voids and foreign materials embedded in films can cause unexpected and unpredictable changes in electrical conductivity.
Fortunately, there is a new eBeam technology that can quickly detect, image and measure critical defects buried within multiple layers of films. Called back-scattered electron imaging, Applied Materials is now enabling the technology in metrology, inspection and review applications.
Detecting buried defects in silicon requires three capabilities. First is being able to penetrate deep into the silicon substrate (Figure 1). Second, once the electrons hit buried defects, they need to have enough energy to escape from the bulk material and return to the detection system (Figure 2). Since the mean-free path of electrons increases with energy, a high-energy beam is required. Third, the resolution needs to be ~1.2 times the defect size. For example, assuming the minimal defect size we want to detect is 100nm, the lowest see-through resolution needs to be approximately 80nm.
Applied’s commercial solution is called Elluminator™ eBeam technology. Today, it is offered on our PROVision™ 2E eBeam inspection system and our SEMVision™ G7 defect review system. We recently demonstrated how the SEMVision G7 system efficiently detects embedded defects and voids using a specially designed detector that enhances detection of high-energy back-scattered electrons.
Better than TEM
A traditional approach to finding buried defects is transmission electron microscopy, a.k.a. TEM. TEM is a slow, destructive method that requires the use of imaging technology to identify where a wafer needs to be cut, ground, polished and ion-milled to produce a defect sample. The TEM analysis cycle usually requires multiple weeks of time and effort.
In contrast, back-scattered electron imaging technology pinpoints buried defects and allows them to be quickly imaged in a non-destructive manner (Figure 3). Typical imaging time is less than two seconds, and process quality analysis can be obtained in just hours.
Applied’s Elluminator technology enables massive defect review runs in a fully automatic mode, generating buried defect maps. With it, we are entering a new era of chip performance and yield management.